The present invention relates to a multiprocessor system and a vehicle control system and relates to, for example, a multiprocessor system and a vehicle control system configured to perform monitoring using a bus mechanism.
In recent years, in the automobile market etc., it has been required to satisfy both enhancement of performance by multicore processing and the like and fail-safety techniques such as Dual Lock Step (DLS) or ternary majority rule (TMR). Various techniques therefor have been suggested.
For example, Japanese Unexamined Patent Application Publication No. 2015-153282 discloses a multiprocessor system that achieves functional safety thereof without closely coupling processor elements. In this multiprocessor system, a bus mechanism holds and compares bus access requests of a plurality of processor elements and detects an abnormality of the processor elements.